Here there are two lectures:

Chapter 4 Part 1 
Signed number representation in 2's complement notation, 
Adder/Subtracter design for unsigned numbers and signed number -- overflow detection in each of them
Time: 1 Hour 2 minutes (from 00:13:00-01:15:00)
http://ee-classes.usc.edu/ee457/ee457_Ch4_P1_Lab3_ALU/Fall2012_Sept_18_20/EE457Lx_20123329.wmv  


Lab 3 ALU design
Time: 45 minutes  
http://ee-classes.usc.edu/ee457/ee457_Ch4_P1_Lab3_ALU/ee457_lab3_4bit_ALU.avi